PAPI  5.3.0.0
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papi_common_strings.h
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1 /* These are used both by PAPI and by the genpapifdef utility */
2 
3 /* They are in their own include to allow genpapifdef to be built */
4 /* without having to link against libpapi.a */
5 
7 /* 0 */ {"PAPI_L1_DCM",
8  "L1D cache misses",
9  "Level 1 data cache misses", 0,
11  NULL, {0},{NULL}, NULL},
12 /* 1 */ {"PAPI_L1_ICM",
13  "L1I cache misses",
14  "Level 1 instruction cache misses", 0,
16  NULL, {0},{NULL}, NULL},
17 /* 2 */ {"PAPI_L2_DCM",
18  "L2D cache misses",
19  "Level 2 data cache misses", 0,
21  NULL, {0},{NULL}, NULL},
22 /* 3 */ {"PAPI_L2_ICM",
23  "L2I cache misses",
24  "Level 2 instruction cache misses", 0,
26  NULL, {0},{NULL}, NULL},
27 /* 4 */ {"PAPI_L3_DCM",
28  "L3D cache misses",
29  "Level 3 data cache misses", 0,
31  NULL, {0},{NULL}, NULL},
32 /* 5 */ {"PAPI_L3_ICM",
33  "L3I cache misses",
34  "Level 3 instruction cache misses", 0,
36  NULL, {0},{NULL}, NULL},
37 /* 6 */ {"PAPI_L1_TCM",
38  "L1 cache misses",
39  "Level 1 cache misses", 0,
41  NULL, {0},{NULL}, NULL},
42 /* 7 */ {"PAPI_L2_TCM",
43  "L2 cache misses",
44  "Level 2 cache misses", 0,
46  NULL, {0},{NULL}, NULL},
47 /* 8 */ {"PAPI_L3_TCM",
48  "L3 cache misses",
49  "Level 3 cache misses", 0,
51  NULL, {0},{NULL}, NULL},
52 /* 9 */ {"PAPI_CA_SNP",
53  "Snoop Requests",
54  "Requests for a snoop", 0,
56  NULL, {0},{NULL}, NULL},
57 /* 10 */ {"PAPI_CA_SHR",
58  "Ex Acces shared CL",
59  "Requests for exclusive access to shared cache line", 0,
61  NULL, {0},{NULL}, NULL},
62 /* 11 */ {"PAPI_CA_CLN",
63  "Ex Access clean CL",
64  "Requests for exclusive access to clean cache line", 0,
66  NULL, {0},{NULL}, NULL},
67 /* 12 */ {"PAPI_CA_INV",
68  "Cache ln invalid",
69  "Requests for cache line invalidation", 0,
71  NULL, {0},{NULL}, NULL},
72 /* 13 */ {"PAPI_CA_ITV",
73  "Cache ln intervene",
74  "Requests for cache line intervention", 0,
76  NULL, {0},{NULL}, NULL},
77 /* 14 */ {"PAPI_L3_LDM",
78  "L3 load misses",
79  "Level 3 load misses", 0,
81  NULL, {0},{NULL}, NULL},
82 /* 15 */ {"PAPI_L3_STM",
83  "L3 store misses",
84  "Level 3 store misses", 0,
86  NULL, {0},{NULL}, NULL},
87 /* 16 */ {"PAPI_BRU_IDL",
88  "Branch idle cycles",
89  "Cycles branch units are idle", 0,
91  NULL, {0},{NULL}, NULL},
92 /* 17 */ {"PAPI_FXU_IDL",
93  "IU idle cycles",
94  "Cycles integer units are idle", 0,
96  NULL, {0},{NULL}, NULL},
97 /* 18 */ {"PAPI_FPU_IDL",
98  "FPU idle cycles",
99  "Cycles floating point units are idle", 0,
101  NULL, {0},{NULL}, NULL},
102 /* 19 */ {"PAPI_LSU_IDL",
103  "L/SU idle cycles",
104  "Cycles load/store units are idle", 0,
106  NULL, {0},{NULL}, NULL},
107 /* 20 */ {"PAPI_TLB_DM",
108  "Data TLB misses",
109  "Data translation lookaside buffer misses", 0,
111  NULL, {0},{NULL}, NULL},
112 /* 21 */ {"PAPI_TLB_IM",
113  "Instr TLB misses",
114  "Instruction translation lookaside buffer misses", 0,
116  NULL, {0},{NULL}, NULL},
117 /* 22 */ {"PAPI_TLB_TL",
118  "Total TLB misses",
119  "Total translation lookaside buffer misses", 0,
121  NULL, {0},{NULL}, NULL},
122 /* 23 */ {"PAPI_L1_LDM",
123  "L1 load misses",
124  "Level 1 load misses", 0,
126  NULL, {0},{NULL}, NULL},
127 /* 24 */ {"PAPI_L1_STM",
128  "L1 store misses",
129  "Level 1 store misses", 0,
131  NULL, {0},{NULL}, NULL},
132 /* 25 */ {"PAPI_L2_LDM",
133  "L2 load misses",
134  "Level 2 load misses", 0,
136  NULL, {0},{NULL}, NULL},
137 /* 26 */ {"PAPI_L2_STM",
138  "L2 store misses",
139  "Level 2 store misses", 0,
141  NULL, {0},{NULL}, NULL},
142 /* 27 */ {"PAPI_BTAC_M",
143  "Br targt addr miss",
144  "Branch target address cache misses", 0,
146  NULL, {0},{NULL}, NULL},
147 /* 28 */ {"PAPI_PRF_DM",
148  "Data prefetch miss",
149  "Data prefetch cache misses", 0,
151  NULL, {0},{NULL}, NULL},
152 /* 29 */ {"PAPI_L3_DCH",
153  "L3D cache hits",
154  "Level 3 data cache hits", 0,
156  NULL, {0},{NULL}, NULL},
157 /* 30 */ {"PAPI_TLB_SD",
158  "TLB shootdowns",
159  "Translation lookaside buffer shootdowns", 0,
161  NULL, {0},{NULL}, NULL},
162 /* 31 */ {"PAPI_CSR_FAL",
163  "Failed store cond",
164  "Failed store conditional instructions", 0,
166  NULL, {0},{NULL}, NULL},
167 /* 32 */ {"PAPI_CSR_SUC",
168  "Good store cond",
169  "Successful store conditional instructions", 0,
171  NULL, {0},{NULL}, NULL},
172 /* 33 */ {"PAPI_CSR_TOT",
173  "Total store cond",
174  "Total store conditional instructions", 0,
176  NULL, {0},{NULL}, NULL},
177 /* 34 */ {"PAPI_MEM_SCY",
178  "Stalled mem cycles",
179  "Cycles Stalled Waiting for memory accesses", 0,
181  NULL, {0},{NULL}, NULL},
182 /* 35 */ {"PAPI_MEM_RCY",
183  "Stalled rd cycles",
184  "Cycles Stalled Waiting for memory Reads", 0,
186  NULL, {0},{NULL}, NULL},
187 /* 36 */ {"PAPI_MEM_WCY",
188  "Stalled wr cycles",
189  "Cycles Stalled Waiting for memory writes", 0,
191  NULL, {0},{NULL}, NULL},
192 /* 37 */ {"PAPI_STL_ICY",
193  "No instr issue",
194  "Cycles with no instruction issue", 0,
196  NULL, {0},{NULL}, NULL},
197 /* 38 */ {"PAPI_FUL_ICY",
198  "Max instr issue",
199  "Cycles with maximum instruction issue", 0,
201  NULL, {0},{NULL}, NULL},
202 /* 39 */ {"PAPI_STL_CCY",
203  "No instr done",
204  "Cycles with no instructions completed", 0,
206  NULL, {0},{NULL}, NULL},
207 /* 40 */ {"PAPI_FUL_CCY",
208  "Max instr done",
209  "Cycles with maximum instructions completed", 0,
211  NULL, {0},{NULL}, NULL},
212 /* 41 */ {"PAPI_HW_INT",
213  "Hdw interrupts",
214  "Hardware interrupts", 0,
216  NULL, {0},{NULL}, NULL},
217 /* 42 */ {"PAPI_BR_UCN",
218  "Uncond branch",
219  "Unconditional branch instructions", 0,
221  NULL, {0},{NULL}, NULL},
222 /* 43 */ {"PAPI_BR_CN",
223  "Cond branch",
224  "Conditional branch instructions", 0,
226  NULL, {0},{NULL}, NULL},
227 /* 44 */ {"PAPI_BR_TKN",
228  "Cond branch taken",
229  "Conditional branch instructions taken", 0,
231  NULL, {0},{NULL}, NULL},
232 /* 45 */ {"PAPI_BR_NTK",
233  "Cond br not taken",
234  "Conditional branch instructions not taken", 0,
236  NULL, {0},{NULL}, NULL},
237 /* 46 */ {"PAPI_BR_MSP",
238  "Cond br mspredictd",
239  "Conditional branch instructions mispredicted", 0,
241  NULL, {0},{NULL}, NULL},
242 /* 47 */ {"PAPI_BR_PRC",
243  "Cond br predicted",
244  "Conditional branch instructions correctly predicted", 0,
246  NULL, {0},{NULL}, NULL},
247 /* 48 */ {"PAPI_FMA_INS",
248  "FMAs completed",
249  "FMA instructions completed", 0,
251  NULL, {0},{NULL}, NULL},
252 /* 49 */ {"PAPI_TOT_IIS",
253  "Instr issued",
254  "Instructions issued", 0,
256  NULL, {0},{NULL}, NULL},
257 /* 50 */ {"PAPI_TOT_INS",
258  "Instr completed",
259  "Instructions completed", 0,
261  NULL, {0},{NULL}, NULL},
262 /* 51 */ {"PAPI_INT_INS",
263  "Int instructions",
264  "Integer instructions", 0,
266  NULL, {0},{NULL}, NULL},
267 /* 52 */ {"PAPI_FP_INS",
268  "FP instructions",
269  "Floating point instructions", 0,
271  NULL, {0},{NULL}, NULL},
272 /* 53 */ {"PAPI_LD_INS",
273  "Loads",
274  "Load instructions", 0,
276  NULL, {0},{NULL}, NULL},
277 /* 54 */ {"PAPI_SR_INS",
278  "Stores",
279  "Store instructions", 0,
281  NULL, {0},{NULL}, NULL},
282 /* 55 */ {"PAPI_BR_INS",
283  "Branches",
284  "Branch instructions", 0,
286  NULL, {0},{NULL}, NULL},
287 /* 56 */ {"PAPI_VEC_INS",
288  "Vector/SIMD instr",
289  "Vector/SIMD instructions (could include integer)", 0,
291  NULL, {0},{NULL}, NULL},
292 /* 57 */ {"PAPI_RES_STL",
293  "Stalled res cycles",
294  "Cycles stalled on any resource", 0,
296  NULL, {0},{NULL}, NULL},
297 /* 58 */ {"PAPI_FP_STAL",
298  "Stalled FPU cycles",
299  "Cycles the FP unit(s) are stalled", 0,
301  NULL, {0},{NULL}, NULL},
302 /* 59 */ {"PAPI_TOT_CYC",
303  "Total cycles",
304  "Total cycles", 0,
306  NULL, {0},{NULL}, NULL},
307 /* 60 */ {"PAPI_LST_INS",
308  "L/S completed",
309  "Load/store instructions completed", 0,
311  NULL, {0},{NULL}, NULL},
312 /* 61 */ {"PAPI_SYC_INS",
313  "Syncs completed",
314  "Synchronization instructions completed", 0,
316  NULL, {0},{NULL}, NULL},
317 /* 62 */ {"PAPI_L1_DCH",
318  "L1D cache hits",
319  "Level 1 data cache hits", 0,
321  NULL, {0},{NULL}, NULL},
322 /* 63 */ {"PAPI_L2_DCH",
323  "L2D cache hits",
324  "Level 2 data cache hits", 0,
326  NULL, {0},{NULL}, NULL},
327 /* 64 */ {"PAPI_L1_DCA",
328  "L1D cache accesses",
329  "Level 1 data cache accesses", 0,
331  NULL, {0},{NULL}, NULL},
332 /* 65 */ {"PAPI_L2_DCA",
333  "L2D cache accesses",
334  "Level 2 data cache accesses", 0,
336  NULL, {0},{NULL}, NULL},
337 /* 66 */ {"PAPI_L3_DCA",
338  "L3D cache accesses",
339  "Level 3 data cache accesses", 0,
341  NULL, {0},{NULL}, NULL},
342 /* 67 */ {"PAPI_L1_DCR",
343  "L1D cache reads",
344  "Level 1 data cache reads", 0,
346  NULL, {0},{NULL}, NULL},
347 /* 68 */ {"PAPI_L2_DCR",
348  "L2D cache reads",
349  "Level 2 data cache reads", 0,
351  NULL, {0},{NULL}, NULL},
352 /* 69 */ {"PAPI_L3_DCR",
353  "L3D cache reads",
354  "Level 3 data cache reads", 0,
356  NULL, {0},{NULL}, NULL},
357 /* 70 */ {"PAPI_L1_DCW",
358  "L1D cache writes",
359  "Level 1 data cache writes", 0,
361  NULL, {0},{NULL}, NULL},
362 /* 71 */ {"PAPI_L2_DCW",
363  "L2D cache writes",
364  "Level 2 data cache writes", 0,
366  NULL, {0},{NULL}, NULL},
367 /* 72 */ {"PAPI_L3_DCW",
368  "L3D cache writes",
369  "Level 3 data cache writes", 0,
371  NULL, {0},{NULL}, NULL},
372 /* 73 */ {"PAPI_L1_ICH",
373  "L1I cache hits",
374  "Level 1 instruction cache hits", 0,
376  NULL, {0},{NULL}, NULL},
377 /* 74 */ {"PAPI_L2_ICH",
378  "L2I cache hits",
379  "Level 2 instruction cache hits", 0,
381  NULL, {0},{NULL}, NULL},
382 /* 75 */ {"PAPI_L3_ICH",
383  "L3I cache hits",
384  "Level 3 instruction cache hits", 0,
386  NULL, {0},{NULL}, NULL},
387 /* 76 */ {"PAPI_L1_ICA",
388  "L1I cache accesses",
389  "Level 1 instruction cache accesses", 0,
391  NULL, {0},{NULL}, NULL},
392 /* 77 */ {"PAPI_L2_ICA",
393  "L2I cache accesses",
394  "Level 2 instruction cache accesses", 0,
396  NULL, {0},{NULL}, NULL},
397 /* 78 */ {"PAPI_L3_ICA",
398  "L3I cache accesses",
399  "Level 3 instruction cache accesses", 0,
401  NULL, {0},{NULL}, NULL},
402 /* 79 */ {"PAPI_L1_ICR",
403  "L1I cache reads",
404  "Level 1 instruction cache reads", 0,
406  NULL, {0},{NULL}, NULL},
407 /* 80 */ {"PAPI_L2_ICR",
408  "L2I cache reads",
409  "Level 2 instruction cache reads", 0,
411  NULL, {0},{NULL}, NULL},
412 /* 81 */ {"PAPI_L3_ICR",
413  "L3I cache reads",
414  "Level 3 instruction cache reads", 0,
416  NULL, {0},{NULL}, NULL},
417 /* 82 */ {"PAPI_L1_ICW",
418  "L1I cache writes",
419  "Level 1 instruction cache writes", 0,
421  NULL, {0},{NULL}, NULL},
422 /* 83 */ {"PAPI_L2_ICW",
423  "L2I cache writes",
424  "Level 2 instruction cache writes", 0,
426  NULL, {0},{NULL}, NULL},
427 /* 84 */ {"PAPI_L3_ICW",
428  "L3I cache writes",
429  "Level 3 instruction cache writes", 0,
431  NULL, {0},{NULL}, NULL},
432 /* 85 */ {"PAPI_L1_TCH",
433  "L1 cache hits",
434  "Level 1 total cache hits", 0,
436  NULL, {0},{NULL}, NULL},
437 /* 86 */ {"PAPI_L2_TCH",
438  "L2 cache hits",
439  "Level 2 total cache hits", 0,
441  NULL, {0},{NULL}, NULL},
442 /* 87 */ {"PAPI_L3_TCH",
443  "L3 cache hits",
444  "Level 3 total cache hits", 0,
446  NULL, {0},{NULL}, NULL},
447 /* 88 */ {"PAPI_L1_TCA",
448  "L1 cache accesses",
449  "Level 1 total cache accesses", 0,
451  NULL, {0},{NULL}, NULL},
452 /* 89 */ {"PAPI_L2_TCA",
453  "L2 cache accesses",
454  "Level 2 total cache accesses", 0,
456  NULL, {0},{NULL}, NULL},
457 /* 90 */ {"PAPI_L3_TCA",
458  "L3 cache accesses",
459  "Level 3 total cache accesses", 0,
461  NULL, {0},{NULL}, NULL},
462 /* 91 */ {"PAPI_L1_TCR",
463  "L1 cache reads",
464  "Level 1 total cache reads", 0,
466  NULL, {0},{NULL}, NULL},
467 /* 92 */ {"PAPI_L2_TCR",
468  "L2 cache reads",
469  "Level 2 total cache reads", 0,
471  NULL, {0},{NULL}, NULL},
472 /* 93 */ {"PAPI_L3_TCR",
473  "L3 cache reads",
474  "Level 3 total cache reads", 0,
476  NULL, {0},{NULL}, NULL},
477 /* 94 */ {"PAPI_L1_TCW",
478  "L1 cache writes",
479  "Level 1 total cache writes", 0,
481  NULL, {0},{NULL}, NULL},
482 /* 95 */ {"PAPI_L2_TCW",
483  "L2 cache writes",
484  "Level 2 total cache writes", 0,
486  NULL, {0},{NULL}, NULL},
487 /* 96 */ {"PAPI_L3_TCW",
488  "L3 cache writes",
489  "Level 3 total cache writes", 0,
491  NULL, {0},{NULL}, NULL},
492 /* 97 */ {"PAPI_FML_INS",
493  "FPU multiply",
494  "Floating point multiply instructions", 0,
496  NULL, {0},{NULL}, NULL},
497 /* 98 */ {"PAPI_FAD_INS",
498  "FPU add",
499  "Floating point add instructions", 0,
501  NULL, {0},{NULL}, NULL},
502 /* 99 */ {"PAPI_FDV_INS",
503  "FPU divide",
504  "Floating point divide instructions", 0,
506  NULL, {0},{NULL}, NULL},
507 /*100 */ {"PAPI_FSQ_INS",
508  "FPU square root",
509  "Floating point square root instructions", 0,
511  NULL, {0},{NULL}, NULL},
512 /*101 */ {"PAPI_FNV_INS",
513  "FPU inverse",
514  "Floating point inverse instructions", 0,
516  NULL, {0},{NULL}, NULL},
517 /*102 */ {"PAPI_FP_OPS",
518  "FP operations",
519  "Floating point operations", 0,
521  NULL, {0},{NULL}, NULL},
522 /*103 */ {"PAPI_SP_OPS",
523  "SP operations",
524  "Floating point operations; optimized to count scaled single precision vector operations", 0,
526  NULL, {0},{NULL}, NULL},
527 /*104 */ {"PAPI_DP_OPS",
528  "DP operations",
529  "Floating point operations; optimized to count scaled double precision vector operations", 0,
531  NULL, {0},{NULL}, NULL},
532 /*105 */ {"PAPI_VEC_SP",
533  "SP Vector/SIMD instr",
534  "Single precision vector/SIMD instructions", 0,
536  NULL, {0},{NULL}, NULL},
537 /*106 */ {"PAPI_VEC_DP",
538  "DP Vector/SIMD instr",
539  "Double precision vector/SIMD instructions", 0,
541  NULL, {0},{NULL}, NULL},
542 /* 107 */ {"PAPI_REF_CYC",
543  "Reference cycles",
544  "Reference clock cycles", 0,
546  NULL, {0},{NULL}, NULL},
547 /*108 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
548 /*109 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
549 /*110 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
550 /*111 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
551 /*112 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
552 /*113 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
553 /*114 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
554 /*115 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
555 /*116 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
556 /*117 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
557 /*118 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
558 /*119 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
559 /*120 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
560 /*121 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
561 /*122 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
562 /*123 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
563 /*124 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
564 /*125 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
565 /*126 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
566 /*127 */ {NULL, NULL, NULL,0,0,0,NULL,{0},{NULL}, NULL},
567 };
568 
569 #if 0
570 const hwi_describe_t _papi_hwi_err[PAPI_NUM_ERRORS] = {
571  /* 0 */ {PAPI_OK, "PAPI_OK", "No error"},
572  /* 1 */ {PAPI_EINVAL, "PAPI_EINVAL", "Invalid argument"},
573  /* 2 */ {PAPI_ENOMEM, "PAPI_ENOMEM", "Insufficient memory"},
574  /* 3 */ {PAPI_ESYS, "PAPI_ESYS", "A System/C library call failed"},
575  /* 4 */ {PAPI_ECMP, "PAPI_ECMP", "Not supported by component"},
576  /* 5 */ {PAPI_ECLOST, "PAPI_ECLOST", "Access to the counters was lost or interrupted"},
577  /* 6 */ {PAPI_EBUG, "PAPI_EBUG", "Internal error, please send mail to the developers"},
578  /* 7 */ {PAPI_ENOEVNT, "PAPI_ENOEVNT", "Event does not exist"},
579  /* 8 */ {PAPI_ECNFLCT, "PAPI_ECNFLCT", "Event exists, but cannot be counted due to hardware resource limits"},
580  /* 9 */ {PAPI_ENOTRUN, "PAPI_ENOTRUN", "EventSet is currently not running"},
581  /*10 */ {PAPI_EISRUN, "PAPI_EISRUN", "EventSet is currently counting"},
582  /*11 */ {PAPI_ENOEVST, "PAPI_ENOEVST", "No such EventSet available"},
583  /*12 */ {PAPI_ENOTPRESET, "PAPI_ENOTPRESET", "Event in argument is not a valid preset"},
584  /*13 */ {PAPI_ENOCNTR, "PAPI_ENOCNTR", "Hardware does not support performance counters"},
585  /*14 */ {PAPI_EMISC, "PAPI_EMISC", "Unknown error code"},
586  /*15 */ {PAPI_EPERM, "PAPI_EPERM", "Permission level does not permit operation"},
587  /*16 */ {PAPI_ENOINIT, "PAPI_ENOINIT", "PAPI hasn't been initialized yet"},
588  /*17 */ {PAPI_ENOCMP, "PAPI_ENOCMP", "Component Index isn't set"},
589  /*18 */ {PAPI_ENOSUPP, "PAPI_ENOSUPP", "Not supported"},
590  /*19 */ {PAPI_ENOIMPL, "PAPI_ENOIMPL", "Not implemented"},
591  /*20 */ {PAPI_EBUF, "PAPI_EBUF", "Buffer size exceeded"},
592  /*21 */ {PAPI_EINVAL_DOM, "PAPI_EINVAL_DOM", "EventSet domain is not supported for the operation"},
593  /*22 */ {PAPI_EATTR, "PAPI_EATTR", "Invalid or missing event attributes"},
594  /*23 */ {PAPI_ECOUNT, "PAPI_ECOUNT", "Too many events or attributes"},
595  /*24 */ {PAPI_ECOMBO, "PAPI_ECOMBO", "Bad combination of features"}
596 };
597 #endif
598 
#define PAPI_PRESET_BIT_TLB
Definition: papi.h:519
#define PAPI_EINVAL_DOM
Definition: fpapi.h:126
#define PAPI_ENOMEM
Definition: fpapi.h:107
#define PAPI_EMISC
Definition: fpapi.h:119
#define PAPI_ENOIMPL
Definition: fpapi.h:124
#define PAPI_PRESET_BIT_L3
Definition: papi.h:518
#define PAPI_PRESET_BIT_L1
Definition: papi.h:516
#define PAPI_ENOEVNT
Definition: fpapi.h:112
#define PAPI_ENOINIT
Definition: fpapi.h:121
#define PAPI_EATTR
Definition: fpapi.h:127
#define PAPI_EISRUN
Definition: fpapi.h:115
#define PAPI_EPERM
Definition: fpapi.h:120
return PAPI_OK
Definition: linux-nvml.c:458
#define PAPI_ENOCMP
Definition: fpapi.h:122
return PAPI_EINVAL
Definition: linux-nvml.c:408
#define PAPI_ECNFLCT
Definition: fpapi.h:113
#define PAPI_ECOUNT
Definition: fpapi.h:128
#define PAPI_ENOCNTR
Definition: fpapi.h:118
#define PAPI_ENOSUPP
Definition: fpapi.h:123
#define PAPI_ENOEVST
Definition: fpapi.h:116
#define PAPI_ECOMBO
Definition: fpapi.h:129
#define PAPI_ECMP
Definition: fpapi.h:109
hwi_presets_t _papi_hwi_presets[PAPI_MAX_PRESET_EVENTS]
#define PAPI_PRESET_BIT_MSC
Definition: papi.h:509
#define PAPI_PRESET_BIT_BR
Definition: papi.h:512
#define PAPI_PRESET_BIT_INS
Definition: papi.h:510
#define PAPI_ESYS
Definition: fpapi.h:108
#define PAPI_MAX_PRESET_EVENTS
Definition: fpapi.h:16
#define PAPI_EBUG
Definition: fpapi.h:111
#define PAPI_NUM_ERRORS
Definition: fpapi.h:44
#define PAPI_PRESET_BIT_FP
Definition: papi.h:520
#define PAPI_ENOTRUN
Definition: fpapi.h:114
#define PAPI_EBUF
Definition: fpapi.h:125
#define PAPI_PRESET_BIT_CACH
Definition: papi.h:515
#define PAPI_PRESET_BIT_CND
Definition: papi.h:513
#define PAPI_ECLOST
Definition: fpapi.h:110
#define PAPI_ENOTPRESET
Definition: fpapi.h:117
#define PAPI_PRESET_BIT_IDL
Definition: papi.h:511
#define PAPI_PRESET_BIT_L2
Definition: papi.h:517
#define PAPI_PRESET_BIT_MEM
Definition: papi.h:514