How to measure 2 derived events on Intel Xeon X5365?

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How to measure 2 derived events on Intel Xeon X5365?

Postby Ashish_Panday » Thu Dec 05, 2013 9:43 pm

I am trying to measure PAPI_L2_DCM and PAPI_L2_DCA so that I can calculate L2 data miss-rate on Intel Xeon x5365.

Currently, I can measure these events individually. But papi does not allow me to measure them together. I should be able to measure these together since both of them require 2 hardware counters each and x5365 has 5 (according to papi_avail). Can anyone explain to me why I am not able to measure them together? Also I'd really appreciate if anyone has any tips for resolving my problem. Here are the papi_avail -e outputs for PAPI_L2_DCA and PAPI_L2_DCM.

Available events and hardware information.
--------------------------------------------------------------------------------
PAPI Version : 5.2.0.0
Vendor string and code : GenuineIntel (1)
Model string and code : Intel(R) Xeon(R) CPU X5365 @ 3.00GHz (15)
CPU Revision : 11.000000
CPUID Info : Family: 6 Model: 15 Stepping: 11
CPU Max Megahertz : 2999
CPU Min Megahertz : 2999
Hdw Threads per core : 1
Cores per Socket : 4
Sockets : 2
NUMA Nodes : 1
CPUs per Node : 8
Total CPUs : 8
Running in a VM : no
Number Hardware Counters : 5
Max Multiplex Counters : 64
--------------------------------------------------------------------------------
Event name: PAPI_L2_DCA
Event Code: 0x80000041
Number of Native Events: 2
Short Description: |L2D cache accesses|
Long Description: |Level 2 data cache accesses|
Developer's Notes: ||
Derived Type: |DERIVED_ADD|
Postfix Processing String: ||
Native Code[0]: 0x40000008 |L2_LD:SELF:ANY:MESI|
Number of Register Values: 0
Native Event Description: |L2 cache reads, masks:This core,All inclusive,Any cacheline access|

Native Code[1]: 0x40000009 |L2_ST:SELF:MESI|
Number of Register Values: 0
Native Event Description: |L2 store requests, masks:This core,Any cacheline access|

-------------------------------------------------------------------------
avail.c PASSED

//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

Available events and hardware information.
--------------------------------------------------------------------------------
PAPI Version : 5.2.0.0
Vendor string and code : GenuineIntel (1)
Model string and code : Intel(R) Xeon(R) CPU X5365 @ 3.00GHz (15)
CPU Revision : 11.000000
CPUID Info : Family: 6 Model: 15 Stepping: 11
CPU Max Megahertz : 2999
CPU Min Megahertz : 2999
Hdw Threads per core : 1
Cores per Socket : 4
Sockets : 2
NUMA Nodes : 1
CPUs per Node : 8
Total CPUs : 8
Running in a VM : no
Number Hardware Counters : 5
Max Multiplex Counters : 64
--------------------------------------------------------------------------------
Event name: PAPI_L2_DCM
Event Code: 0x80000002
Number of Native Events: 2
Short Description: |L2D cache misses|
Long Description: |Level 2 data cache misses|
Developer's Notes: ||
Derived Type: |DERIVED_SUB|
Postfix Processing String: ||
Native Code[0]: 0x4000000a |L2_LINES_IN:SELF:ANY|
Number of Register Values: 0
Native Event Description: |L2 cache misses, masks:This core,All inclusive|

Native Code[1]: 0x4000000b |BUS_TRANS_IFETCH:SELF|
Number of Register Values: 0
Native Event Description: |Instruction-fetch bus transactions, masks:This core|

-------------------------------------------------------------------------
avail.c PASSED



Thanks and regards,
Ashish Panday.

P.S. Here is my code

#include <papi.h>
#include <stdio.h>
#include <stdlib.h>

#define NUM_EVENTS 2
#define INDEX 100

static const char *ErrMsg[] = {
"Example program",
"Couldn't find any hardware counters",
"Couldn't start counting events",
"Couldn't stop counting events",
"Couldn't translate event code into event name",
"Couldn't initialize overflow handler",
"Couldn't reset event set"
};


void handle_error(int errcode)
{
printf("Execution yielded error code %d : %s\n", errcode, ErrMsg[errcode]);
exit(errcode);
}

int main()
{
int Events[NUM_EVENTS] = {PAPI_L2_DCM, PAPI_L2_DCA};
long long values[NUM_EVENTS];
float matrixa[INDEX][INDEX], matrixb[INDEX][INDEX], mresult[INDEX][INDEX];
int i=0, j=0,k = 0;
for ( i=0; i<INDEX*INDEX; i++ ){
mresult[0][i] = 0.0;
matrixa[0][i] = matrixb[0][i] = rand()*(float)1.1; }

/* Start counting events */
if (PAPI_start_counters(Events, NUM_EVENTS) != PAPI_OK)
handle_error(1);

/* Read the counters */
if (PAPI_read_counters(values, NUM_EVENTS) != PAPI_OK)
handle_error(1);

/* Do some computation here */
for (i=0;i<INDEX;i++)
for(j=0;j<INDEX;j++)
for(k=0;k<INDEX;k++)
mresult[i][j]=mresult[i][j] + matrixa[i][k]*matrixb[k][j];


/* Stop counting events */
if (PAPI_stop_counters(values, NUM_EVENTS) != PAPI_OK)
handle_error(1);

printf("%lld number of misses in L2\n",values[0]);
printf("%lld number of accesses in L2\n",values[1]);
return 0;
}
Ashish_Panday
 
Posts: 1
Joined: Thu Dec 05, 2013 8:58 pm

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