Heike was correct that Core i7 has an L3 cache that is shared by all cores on the chip. However the counters that measure activity in that cache are broken in a totally different way than they are broken on AMD. Intel implemented a rich set of counters for i7: each core has 3 fixed and 4 programmable hardware counters. In addition, there are 8 counters in what Intel calls the "Uncore" on the chip, rather than on any specific core. It is these uncore counters that measure L3 activity. Unfortunately, current interfaces only allow access to these counters in global counting mode, across all processors and processes. PAPI doesn't use that mode, so these events are unavailable.
This may change at some point in the future, but will require a rewrite of the low level kernel drivers that provide access to these resources.